bitkeeper revision 1.15.1.8 (3e2d5b75k3SSnLdVzMd7kREO_EvMLw)
authorakw27@labyrinth.cl.cam.ac.uk <akw27@labyrinth.cl.cam.ac.uk>
Tue, 21 Jan 2003 14:38:45 +0000 (14:38 +0000)
committerakw27@labyrinth.cl.cam.ac.uk <akw27@labyrinth.cl.cam.ac.uk>
Tue, 21 Jan 2003 14:38:45 +0000 (14:38 +0000)
Added macros and counters to page table flushes.

macros and the counter are in a new header file -- flushtlb.h

.rootkeys
xen-2.4.16/common/domain.c
xen-2.4.16/common/memory.c
xen-2.4.16/include/asm-i386/flushtlb.h [new file with mode: 0644]
xen-2.4.16/include/asm-i386/page.h

index 64c5e5a0a9c0d391d50001c41836e77ff7e9e19c..84ae52496a70c1bbad8e00672f607ac44a97101b 100644 (file)
--- a/.rootkeys
+++ b/.rootkeys
 3e20b82fl1jmQiKdLy7fxMcutfpjWA xen-2.4.16/include/asm-i386/domain_page.h
 3ddb79c2O729EttZTYu1c8LcsUO_GQ xen-2.4.16/include/asm-i386/elf.h
 3ddb79c3NU8Zy40OTrq3D-i30Y3t4A xen-2.4.16/include/asm-i386/fixmap.h
+3e2d29944GI24gf7vOP_7x8EyuqxeA xen-2.4.16/include/asm-i386/flushtlb.h
 3ddb79c39o75zPP0T1aQQ4mNrCAN2w xen-2.4.16/include/asm-i386/hardirq.h
 3ddb79c3BFEIwXR4IsWbwp4BoL4DkA xen-2.4.16/include/asm-i386/hdreg.h
 3ddb79c3TMDjkxVndKFKnGiwY0HzDg xen-2.4.16/include/asm-i386/i387.h
index 31ae0b97262afda24e07c40f99c02027d25428fa..ea14a5ea21a9ca894b921d1979926ad1113cb2b4 100644 (file)
@@ -11,6 +11,7 @@
 #include <xeno/dom0_ops.h>
 #include <asm/io.h>
 #include <asm/domain_page.h>
+#include <asm/flushtlb.h>
 
 rwlock_t tasklist_lock __cacheline_aligned = RW_LOCK_UNLOCKED;
 
@@ -581,8 +582,7 @@ int setup_guestos(struct task_struct *p, dom0_newdomain_t *params)
 
     /* Install the new page tables. */
     __cli();
-    __asm__ __volatile__ (
-        "mov %%eax,%%cr3" : : "a" (pagetable_val(p->mm.pagetable)));
+    __write_cr3_counted(pagetable_val(p->mm.pagetable));
 
     /* Copy the guest OS image. */
     src = (char *)__va(mod[0].mod_start + 12);
@@ -657,8 +657,7 @@ int setup_guestos(struct task_struct *p, dom0_newdomain_t *params)
     }
 
     /* Reinstate the caller's page tables. */
-    __asm__ __volatile__ (
-        "mov %%eax,%%cr3" : : "a" (pagetable_val(current->mm.pagetable)));    
+    __write_cr3_counted(pagetable_val(current->mm.pagetable));
     __sti();
 
     new_thread(p, 
index 226772ebceaf6456a15c588a0874b07e2f6f103c..836e27abac13f8bd329f00d9ae0a06fea0f6c36f 100644 (file)
 #include <xeno/sched.h>
 #include <xeno/errno.h>
 #include <asm/page.h>
+#include <asm/flushtlb.h>
 #include <asm/io.h>
 #include <asm/uaccess.h>
 #include <asm/domain_page.h>
@@ -766,9 +767,7 @@ int do_process_page_updates(page_update_request_t *updates, int count)
     if ( tlb_flush[smp_processor_id()] )
     {
         tlb_flush[smp_processor_id()] = 0;
-        __asm__ __volatile__ (
-            "movl %%eax,%%cr3" : : 
-            "a" (pagetable_val(current->mm.pagetable)));
+        __write_cr3_counted(pagetable_val(current->mm.pagetable));
     }
 
     return(0);
diff --git a/xen-2.4.16/include/asm-i386/flushtlb.h b/xen-2.4.16/include/asm-i386/flushtlb.h
new file mode 100644 (file)
index 0000000..306839c
--- /dev/null
@@ -0,0 +1,48 @@
+/******************************************************************************
+ * flushtlb.h
+ * 
+ * TLB flush macros that count flushes.  Counting is used to enforce 
+ * zero-copy safety, particularily for the network code.
+ *
+ * akw - Jan 21, 2003
+ */
+
+#ifndef __FLUSHTLB_H
+#define __FLUSHTLB_H
+
+#include <xeno/smp.h>
+
+unsigned long tlb_flush_count[NR_CPUS];
+//#if 0 
+#define __read_cr3(__var)                                               \
+    do {                                                                \
+                __asm__ __volatile (                                    \
+                        "movl %%cr3, %0;"                               \
+                        : "=r" (__var));                                \
+    } while (0)
+//#endif
+
+#define __write_cr3_counted(__pa)                                       \
+    do {                                                                \
+                __asm__ __volatile__ (                                  \
+                        "movl %0, %%cr3;"                               \
+                        :: "r" (__pa)                                    \
+                        : "memory");                                    \
+                tlb_flush_count[smp_processor_id()]++;                  \
+    } while (0)
+
+//#endif
+#define __flush_tlb_counted()                                           \
+        do {                                                            \
+                unsigned int tmpreg;                                    \
+                                                                        \
+                __asm__ __volatile__(                                   \
+                        "movl %%cr3, %0;  # flush TLB \n"               \
+                        "movl %0, %%cr3;                "               \
+                        : "=r" (tmpreg)                                \
+                        :: "memory");                                   \
+                tlb_flush_count[smp_processor_id()]++;                  \
+        } while (0)
+
+#endif
+                           
index b0d68a324a710846ab44e25517a954e597189ad5..da50b59fd75295756a05ad2163d5aa4f24e67c0e 100644 (file)
@@ -91,36 +91,36 @@ typedef struct { unsigned long pt_lo; } pagetable_t;
 #include <asm/processor.h>
 #include <asm/fixmap.h>
 #include <asm/bitops.h>
+#include <asm/flushtlb.h>
 
 extern l2_pgentry_t idle0_pg_table[ENTRIES_PER_L2_PAGETABLE];
 extern l2_pgentry_t *idle_pg_table[NR_CPUS];
 extern void paging_init(void);
 
-#define __flush_tlb()                                                  \
-       do {                                                            \
-               unsigned int tmpreg;                                    \
-                                                                       \
-               __asm__ __volatile__(                                   \
-                       "movl %%cr3, %0;  # flush TLB \n"               \
-                       "movl %0, %%cr3;              \n"               \
-                       : "=r" (tmpreg)                                 \
-                       :: "memory");                                   \
-       } while (0)
+#define __flush_tlb() __flush_tlb_counted()
 
 /* Flush global pages as well. */
+
+#define __pge_off()                                                     \
+        do {                                                            \
+                __asm__ __volatile__(                                   \
+                        "movl %0, %%cr4;  # turn off PGE     "          \
+                        :: "r" (mmu_cr4_features & ~X86_CR4_PGE));      \
+        } while (0)
+
+#define __pge_on()                                                      \
+        do {                                                            \
+                __asm__ __volatile__(                                   \
+                        "movl %0, %%cr4;  # turn off PGE     "          \
+                        :: "r" (mmu_cr4_features));                     \
+        } while (0)
+
+
 #define __flush_tlb_all()                                              \
        do {                                                            \
-               unsigned int tmpreg;                                    \
-                                                                       \
-               __asm__ __volatile__(                                   \
-                       "movl %1, %%cr4;  # turn off PGE     \n"        \
-                       "movl %%cr3, %0;  # flush TLB        \n"        \
-                       "movl %0, %%cr3;                     \n"        \
-                       "movl %2, %%cr4;  # turn PGE back on \n"        \
-                       : "=&r" (tmpreg)                                \
-                       : "r" (mmu_cr4_features & ~X86_CR4_PGE),        \
-                         "r" (mmu_cr4_features)                        \
-                       : "memory");                                    \
+                __pge_off();                                            \
+               __flush_tlb_counted();                                  \
+                __pge_on();                                             \
        } while (0)
 
 #define __flush_tlb_one(__addr) \